Verilog の driving strengths を把握しておこう

Verilog has 4 driving strengths, 3 capacitive strengths and high impedance.

7 Supply drive supply0 , supply1
6 Strong drive strong0 , strong1
5 Pull drive pull0 , pull1
4 Large capacitive large
3 Weak drive weak0 , weak1
2 Medium capacitive medium
1 Small capacitive small
0 High impedance highz0 , highz1

Example:
assign (weak1, strong0) Q = A + B;
The strength combinations (highz0, highz1) and (highz1, highz0) are not allowed.

Verilog Language has two primary data types. Nets are represent structural connections between components.

wire, tri Interconnecting wire - no special resolution function
wor, trior Wired outputs OR together (models ECL)
wand, triand Wired outputs AND together (models open-collector)
tri0, tri1 Net pulls-down or pulls-up when not driven
supply0, supply1 Net has a constant logic 0 or logic 1 (supply strength)
trireg Retains last value, when driven by z (tristate).

参照:
http://www.hdlworks.com/hdl_corner/verilog_ref/items/Strengths.htm
http://www.asic-world.com/verilog/syntax3.html
2015-06-15 : Work-Product-Verification : コメント : 0 : トラックバック : 0
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